SiCLOPS' processor is the single most important key to the functionally of the VIRGIL. While it must intelligently code the 3 byte seismic events that come out of the ES-T, it must also perform the Cyclic Redundancy Check, listen for orbiter handoffs, and retransmit to nearby VIRGILs. A block diagram of critical components of the Slate can be seen in Figure 1.

Of note, a 64GB compact flash for embedded software will allow SiCLOPS to store multiple boot images on the card. This is of critical important in a COTS device being operated in space, even with steps taken to minimize bit errors. By intelligently formatting the card, we can store different loads in different physical locations on the card, so as to minimize the effect that one bad block of memory might have. Since each seismic event is roughly 3bytes, SiCLOPS estimates up to 85 gigaevents can be stored, a rate which far excedes the expected life of the sensor. Events will be stored in a first-in, first-out order until the memory card is full. This ensures that the data is transmitted and that we can remotely poll the VIRGILs from the orbiter if need be.

256MB of RAM allows the entire embedded software to be volatile memory, and a 400MHz processor ensures an optimal mix of low heat production with enough power to preform our CRC [1]. The Kinemetrics Basalt ADC will connect to the processor through 10BaseT ethernet. Figure 2 shows a production unit Slate. SiCLOPS will remove the Slate from the housing and mount it in the VIRGIL housing after conformal coating it.